Efficient RF Signal Identification on Xilinx RFSoC

Edge radios are getting smarter. With Xilinx/Zynq UltraScale+ RFSoC, you can sample multi-GHz bandwidths, run DSP in programmable logic (PL), and execute deep nets on the ARM cores (PS) or an AI accelerator—all on a single board. This post lays out a practical, power-aware pipeline for real-time RF signal identification (modulation/class/protocol hints) that fits on RFSoC evaluation boards (e.g., ZCU111/ZCU208) or an RFSoC SOM. We’ll cover the end-to-end flow: streaming from RF ADCs → PL feature extraction → quantized inference → decisions and telemetry.

Why split this way? PL handles deterministic, high-rate DSP with microsecond latency. The PS/DPU runs compact, quantized models at tens of inferences per millisecond. DMA bridges them.